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Copyright © 2002 Harry Broeders. Version 5.20
THRAss11 was designed and implemented by former THR student (graduated in 1996) Rob van Beek. The assembler is part of a 68HC11 simulator called THRSim11. The assemblers accept options from the dialog box opened via the File|Options|Assembler menu item. These options are the following:
The generated machine code is loaded in the simulated memory. The S1 formatted
object file is placed in file filename.S19
if the generate S19
file option is enabled. The listing and error messages are written to a specific
window. The listing and error messages are also placed in the file
filename.lst
if the generate list file option is on.
The listing file contains the address and bytes assembled for each line of input followed by the original input line (unchanged, but moved over to the right some). If an input line causes more than 5 bytes to be output (e.g. a long FCC directive), additional bytes are listed on succeeding lines with no address preceding them.
The general format of a line assembler code is as follows:
LABEL
MNEMONIC OPERAND
COMMENT
A symbol is defined as a string of characters with a non-initial digit. The
string of characters may be from the set: [a-z][A-Z]_.[0-9]
(.
and _
count as non-digits). All characters of
a symbol are significant, with upper and lower case characters being
non-distinct. There is no maximum number of characters
in a symbol. The symbol table has no limits (only the amount of
RAM you have).
A symbol starting in the first column is a label and may be followed by a
:
. This :
is not part of the label and is replaced
by a blank by the THRSim11 assembler. A label may appear on a line by itself
and is then interpreted as: Label EQU
*
A symbol preceded by at least one whitespace character is a mnemonic.
Upper case characters in this field are converted to lower case before being
checked as a legal mnemonic. Thus nop
, NOP
and
even NoP
are recognized as the same mnemonic.
Note that register names that sometimes appear at the end of a mnemonic (e.g.
NEGA
or STX
) must not be separated by any whitespace
characters. Thus CLRA
means clear accumulator A
,
but that CLR A
means clear memory location A
.
All the valid 68HC11 instruction mnemonics can be used. Click here for a list.
Assembler directives (also called pseudo-ops) are found in the opcode field
and will cause the assembler to perform a specific action. The only pseudo-ops
supported are: ORG
,
FCC
, FDB
,
FCB
, EQU
,
RMB
, END
,
and #INCLUDE
.
Some of the more common pseudo-ops are not present:
BSZ
or ZMB
Use FCB
0,0,0,0,0,0
instead of ZMB 6
.
FILL
Use FCB 3,3,3,3,3,3
instead
of FILL 3,6
.
PAGE
just for cosmetics anyway.
OPT
Options are set using the File|Options menu.
SPC
Use blank lines instead.
TTL
just for cosmetics anyway.
NAM[E]
just for cosmetics anyway.
The mnemonic can be followed by the operand separated by at least one whitespace character. The operand specifies the addressing mode. Not every mnemonic can be combined with every addressing mode. Click here for a list of valid combinations of mnemonics and addressing modes.
#expression | Immediate. LDAA #3 |
expression | Direct. LDX $34 LDAB <PIET |
expression | Extended. LDX $1034 |
expression,X expression,Y |
Indexed. LDAA 0,X |
address | Relative. BRA LABEL |
For indexed addressing, the comma is required before the register; INC
X
and INC ,X
are not the same.
The force direct addressing operator '<' is implemented. The force extended addressing operator '>' is implemented.
For the BCLR
and BSET
instructions the addressing
mode is followed by a mask. For the BRCLR
and BRSET
instructions the addressing mode is followed by a mask and a label. Bit
manipulation operands can be separated by blanks or by commas. Before the
mask you may use a # symbol.
Expressions may consist of symbols, constants or the character
'*
' (denoting the current
value of the program counter) joined together by one of the operators:
+-*/\!~&|
. The operators are:
+
add
-
subtract
*
multiply
/
divide
\
remainder after division
~
bitwise not
&
bitwise and
|
bitwise or
!
bitwise or
^
bitwise exor
The operators have the following priority:
* / \
highest
+ -
&
^
! |
lowest
Operators with equal priority are evaluated left to right and parenthesised
expressions can be used to change the evaluation order. '(
'
and ')
' or '{
' and '}
' can be used
to parenthesize an expression. Arithmetic is carried out in signed
twos-complement integer precision (32 bits).
Constants are constructed with the following syntax:
'
followed by ASCII character.
"
followed by two ASCII characters.
$
followed by hexadecimal constant.
&
followed by decimal constant.
@
followed by octal constant.
%
followed by binary constant.
Any text after all operands for a given mnemonic have been processed or,
a line beginning with *
up to the end of line or, an empty line
are all ignored by the assembler and can be used as comments.
Error diagnostics are placed in the listing file just below the line containing the error. Format of the error line is:
TEST STAA #2
E ^ Immediate addressing mode is not allowed
here.
Error messages are meant to be self-explanatory.
Finally, some errors are classified as fatal and cause an immediate termination of the assembly. Generally these errors occur when a temporary file cannot be created or is lost during the assembly. Consult your local guru if this happens.
THRAss11 is a classic 2-pass assembler. Pass 1 establishes the symbol table and pass 2 generates the code. Equates that have forward references can thus cause so called "phasing errors" in pass 2.
Known differences with AS11 (the free 68HC11 assembler from Motorola) are described here.